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TSC timecounter disabled: APM enabled.
TSC timecounter disabled: C3 enabled.
SMP: %sed TSC synchronization test
TSC timecounter discards lower %d bit(s)
tsc_levels_changed() called but no cpufreq device?
tsc_levels_changed: no max freq found
Disable TSC frequency calibrationDisable x86 Time Stamp CounterIndicates whether the TSC is safe to use in SMP modeIndicates whether the TSC is P-state invariantmachdep.disable_tsc_calibrationkern.timecounter.invariant_tscpassfailTSC-lowHypervisor: Origin = "%s"
VMwareVMwaresmbios.system.serialVMware-VMWCalibrating TSC clock ... TSC clock: %ju Hz
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