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V3BuI=-=Y-=vf	$$FreeBSD: release/9.1.0/sys/dev/drm2/i915/i915_debug.c 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drmP.h 237882 2012-07-01 06:41:39Z mav $$FreeBSD: release/9.1.0/sys/dev/drm2/drm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_atomic.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_internal.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_linux_list.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_mm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_linux_list.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_hashtab.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/i915/i915_drm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/i915/i915_drv.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drm_mm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/i915/i915_reg.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/drmP.h 237882 2012-07-01 06:41:39Z mav $$FreeBSD: release/9.1.0/sys/dev/drm2/i915/i915_drm.h 235783 2012-05-22 11:07:44Z kib $$FreeBSD: release/9.1.0/sys/dev/drm2/i915/i915_drv.h 235783 2012-05-22 11:07:44Z kib $GCC: (GNU) 4.2.1 20070831 patched [FreeBSD]yesno snooped (LLC+MLC) uncached snooped (LLC) blt render bsdunknownbugnonebit9bit9/bit10bit9/bit11bit9/bit10/bit11bit9/bit17bit9/bit10/bit17infoNAi915_gem_wired_pagesLwedgedImax_freqcache_sharingsync_execfix_miintr_pfenableddisabledself-refresh: %s%s command stream:
  HEAD: 0x%08x
  TAIL: 0x%08x
  ACTHD: 0x%08x
  IPEIR: 0x%08x
  IPEHR: 0x%08x
  INSTDONE: 0x%08x
  INSTDONE1: 0x%08x
  BBADDR: 0x%08jx
  INSTPS: 0x%08x
  INSTPM: 0x%08x
  FADDR: 0x%08x
  FAULT_REG: 0x%08x
  SYNC_0: 0x%08x
  SYNC_1: 0x%08x
  seqno: 0x%08x
  ring->head: 0x%08x
  ring->tail: 0x%08x
%s [%d]:
  purgeable dirty X Y P p (name: %d) (fence: %d)
Current sequence (%s): %d
Waiter sequence (%s):  %d
IRQ sequence (%s):     %d
XYPp (%s mappable) (%s)gen: %d
pch: %d
is_mobile: %s
is_i85x: %s
is_i915g: %s
is_i945gm: %s
is_g33: %s
need_gfx_hws: %s
is_g4x: %s
is_pineview: %s
has_fbc: %s
has_pipe_cxsr: %s
has_hotplug: %s
cursor_needs_physical: %s
has_overlay: %s
overlay_needs_physical: %s
supports_tv: %s
has_bsd_ring: %s
has_blt_ring: %s
has_llc: %s
GFX_MODE: 0x%08x
%s
PP_DIR_BASE: 0x%08x
PP_DIR_BASE_READ: 0x%08x
PP_DIR_DCLV: 0x%08x
aliasing PPGTT:
pd gtt offset: 0x%08x
ECOCHK: 0x%08x
power context render context GFXEC: %ld
INTTOEXT%02d: 0x%08x
No ringbuffer setup
%08x :  %08x
Reserved fences = %d
Total fences = %d
Fenced object[%2d] = unusedInterrupt enable:    %08x
Interrupt identity:  %08x
Interrupt mask:      %08x
Pipe %c stat:         %08x
Interrupts received: %d
   %u objects, %zu bytes
%zu [%zu] gtt total
Active:
Inactive:
Pinned:
Flushing:
Deferred free:
DDC = 0x%08x
C0DRB3 = 0x%04x
C1DRB3 = 0x%04x
MAD_DIMM_C0 = 0x%08x
MAD_DIMM_C1 = 0x%08x
MAD_DIMM_C2 = 0x%08x
TILECTL = 0x%08x
ARB_MODE = 0x%08x
DISP_ARB_CTL = 0x%08x
w/ctx: %d, w/o ctx: %d
forcewake count = %u
Stall check enabled, %d prepares
FBC enabledFBC disabled: no outputsnot enough stolen memorymode not supportedmode too largeFBC unsupported on planescanout buffer not tiledmultiple pipes are enabledunknown reasonunsupported on this chipset915frq%d		%d
Not supported
GMCH temp: %ld
Chipset power: %ld
GFX power: %ld
Total power: %ld
RC information accurate: %s
Video Turbo Mode: %s
HW control enabled: %s
SW control enabled: %s
RC1e Enabled: %s
RC6 Enabled: %s
Deep RC6 Enabled: %s
Deepest RC6 Enabled: %s
Current RC state: Core Power Down
on
RC3
RC6
RC7
Unknown
Core Power Down: %s
HD boost: %s
Boost freq: %d
Gated voltage change: %s
Starting frequency: P%d
Max P-state: P%d
Min P-state: P%d
RS1 VID: %d
RS2 VID: %d
Render standby enabled: %s
Current RS state: RC1
RC1E
RS1
RS2 (RC6)
RC3 (RC6+)
unknown
Requested P-state: %d
Requested VID: %d
Current VID: %d
Current P-state: %d
GT_PERF_STATUS: 0x%08x
RPSTAT1: 0x%08x
Render p-state ratio: %d
Render p-state VID: %d
Render p-state limit: %d
CAGF: %dMHz
RP CUR UP EI: %dus
RP CUR UP: %dus
RP PREV UP: %dus
RP CUR DOWN EI: %dus
RP CUR DOWN: %dus
RP PREV DOWN: %dus
no P-state info available
no error state collected
Time: %jd s %jd us
PCI ID: 0x%04x
EIR: 0x%08x
PGTBL_ER: 0x%08x
  fence[%d] = %08jx
ERROR: 0x%08x
DONE_REG: 0x%08x
ActivePinned%s --- gtt_offset = 0x%08x
%s --- %d requests
%s --- ringbuffer = 0x%08x
Ring %s:
  Head :    %08x
  Tail :    %08x
  Size :    %08x
  Active :  %08x
  NOPID :   %08x
  Sync 0 :   %08x
  Sync 1 :   %08x
  Control : %08x
  Start :   %08x
Render requests:
    %d @ %d
BSD requests:
BLT requests:
No requests
i915_capabilitiesi915_gem_objectsi915_gem_gtti915_gem_activei915_gem_flushingi915_gem_inactivei915_gem_pinnedi915_gem_deferred_freei915_gem_pageflipi915_gem_requesti915_gem_seqnoi915_gem_fence_regsi915_gem_interrupti915_gem_hwsi915_gem_hws_blti915_gem_hws_bsdi915_ringbuffer_datai915_ringbuffer_infoi915_bsd_ringbuffer_datai915_bsd_ringbuffer_infoi915_blt_ringbuffer_datai915_blt_ringbuffer_infoi915_error_statei915_rstdby_delaysi915_cur_delayinfoi915_delayfreq_tablei915_inttoext_tablei915_drpc_infoi915_emon_statusi915_ring_freq_tablei915_gfxeci915_fbc_statusi915_sr_statusi915_gem_framebufferi915_context_statusi915_swizzle_infoi915_ppgtt_infoi915_ring_freq_tablei915_cache_sharingi915_max_freq  %08x %8u %04x %04x %08x%s%s%s%s%s%s%s0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x
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North Display Interrupt enable:		%08x
North Display Interrupt identity:	%08x
North Display Interrupt mask:		%08x
South Display Interrupt enable:		%08x
South Display Interrupt identity:	%08x
South Display Interrupt mask:		%08x
Graphics Interrupt enable:		%08x
Graphics Interrupt identity:		%08x
Graphics Interrupt mask:		%08x
Graphics Interrupt mask (%s):	%08x
Total %d objects, %zu bytes, %zu GTT size
%u [%u] objects, %zu [%zu] bytes in gtt
  %u [%u] active objects, %zu [%zu] bytes
  %u [%u] pinned objects, %zu [%zu] bytes
  %u [%u] inactive objects, %zu [%zu] bytes
  %u [%u] freed objects, %zu [%zu] bytes
%u pinned mappable objects, %zu bytes
%u fault mappable objects, %zu bytes
bit6 swizzle for X-tiling = %s
bit6 swizzle for Y-tiling = %s
No flip due on pipe %c (plane %c)
Flip queued on pipe %c (plane %c)
Flip pending (waiting for vsync) on pipe %c (plane %c)
Stall check waiting for page flip ioctl, Old framebuffer gtt_offset 0x%08x
New framebuffer gtt_offset 0x%08x
FBC unsupported on this chipsetGPU freq (MHz)	Effective CPU freq (MHz)
error: [drm:pid%d:%s] *ERROR* pcode read of freq table timed out
RC information inaccurate because userspace holds a reference 
Lowest (RPN) frequency: %dMHz
Nominal (RP1) frequency: %dMHz
Max non-overclocked (RP0) frequency: %dMHz
  seqno 0x%08x, emitted %ld, tail 0x%08x
info: [drm] Manually setting wedged to %d
[drm:pid%d:%s] Manually setting uncore sharing to %d
[drm:pid%d:%s] Manually setting max freq to %d
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