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!<arch>
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@hwpmccmask=edgeinv,osusranythread+activenonesinglebothanybusreqtypecascadecomplementmask=precisetag=threshold=count=core=agent=prefetch=cachestate=trans=snoopresponse=snooptype=rsp=DISABLEDFREEALLOCATEDSTOPPEDRUNNINGDELETEDSSSCTSTCINSTR_RETIRED_ANYCPU_CLK_UNHALTED_CORECPU_CLK_UNHALTED_REFbranch-instruction-retiredbranch-misses-retiredinstruction-retiredllc-missesllc-referenceunhalted-reference-cyclesunhalted-core-cyclesBACLEARSBOGUS_BRBR_BAC_MISSP_EXECBR_CALL_EXECBR_CALL_MISSP_EXECBR_CND_EXECBR_CND_MISSP_EXECBR_IND_CALL_EXECBR_IND_EXECBR_IND_MISSP_EXECBR_INST_DECODEDBR_INST_EXECBR_INST_RETIRED.ANYBR_INST_RETIRED.ANY1BR_INST_RETIRED.MISPREDBR_INST_RETIRED.MISPRED_TAKENBR_INST_RETIRED.PRED_TAKENBR_INST_RETIRED.TAKENBR_MISSP_EXECBR_RET_BAC_MISSP_EXECBR_RET_EXECBR_RET_MISSP_EXECBR_TKN_BUBBLE_1BR_TKN_BUBBLE_2BUSQ_EMPTYBUS_BNR_DRVBUS_DATA_RCVBUS_DRDY_CLOCKSBUS_HITM_DRVBUS_HIT_DRVBUS_IO_WAITBUS_LOCK_CLOCKSBUS_REQUEST_OUTSTANDINGBUS_TRANS_ANYBUS_TRANS_BRDBUS_TRANS_BURSTBUS_TRANS_DEFBUS_TRANS_IFETCHBUS_TRANS_INVALBUS_TRANS_IOBUS_TRANS_MEMBUS_TRANS_PBUS_TRANS_PWRBUS_TRANS_RFOBUS_TRANS_WBCMP_SNOOPCPU_CLK_UNHALTED.BUSCPU_CLK_UNHALTED.CORE_PCPU_CLK_UNHALTED.NO_OTHERCYCLES_DIV_BUSYCYCLES_L1I_MEM_STALLEDDATA_TLB_MISSES.DTLB_MISSDATA_TLB_MISSES.DTLB_MISS_LDDATA_TLB_MISSES.DTLB_MISS_STDATA_TLB_MISSES.UTLB_MISS_LDDELAYED_BYPASS.FPDELAYED_BYPASS.LOADDELAYED_BYPASS.SIMDDIVDIV.ARDIV.SDTLB_MISSES.ANYDTLB_MISSES.L0_MISS_LDDTLB_MISSES.MISS_LDDTLB_MISSES.MISS_STEIST_TRANSESP.ADDITIONSESP.SYNCHEXT_SNOOPFP_ASSISTFP_ASSIST.ARFP_COMP_OPS_EXEFP_MMX_TRANS_TO_FPFP_MMX_TRANS_TO_MMXHW_INT_RCVICACHE.ACCESSESICACHE.MISSESIDLE_DURING_DIVILD_STALLINST_QUEUE.FULLINST_RETIRED.ANY_PINST_RETIRED.LOADSINST_RETIRED.OTHERINST_RETIRED.STORESITLB.FLUSHITLB.LARGE_MISSITLB.MISSESITLB.SMALL_MISSITLB_MISS_RETIREDL1D_ALL_CACHE_REFL1D_ALL_REFL1D_CACHE.LDL1D_CACHE.STL1D_CACHE_LOCKL1D_CACHE_LOCK_DURATIONL1D_M_EVICTL1D_M_REPLL1D_PEND_MISSL1D_PREFETCH.REQUESTSL1D_REPLL1D_SPLIT.LOADSL1D_SPLIT.STORESL1I_MISSESL1I_READSL2_ADSL2_DBUS_BUSY_RDL2_IFETCHL2_LDL2_LINES_INL2_LINES_OUTL2_LOCKL2_M_LINES_INL2_M_LINES_OUTL2_NO_REQL2_REJECT_BUSQL2_RQSTSL2_RQSTS.SELF.DEMAND.I_STATEL2_RQSTS.SELF.DEMAND.MESIL2_STLOAD_BLOCK.L1DLOAD_BLOCK.OVERLAP_STORELOAD_BLOCK.STALOAD_BLOCK.STDLOAD_BLOCK.UNTIL_RETIRELOAD_HIT_PREMACHINE_CLEARS.SMCMACHINE_NUKES.MEM_ORDERMACRO_INSTS.ALL_DECODEDMACRO_INSTS.CISC_DECODEDMEMORY_DISAMBIGUATION.RESETMEMORY_DISAMBIGUATION.SUCCESSMEM_LOAD_RETIRED.DTLB_MISSMEM_LOAD_RETIRED.L2_HITMEM_LOAD_RETIRED.L2_LINE_MISSMEM_LOAD_RETIRED.L2_MISSMULMUL.ARMUL.SPAGE_WALKS.CYCLESPAGE_WALKS.WALKSPREFETCH.PREFETCHNTAPREFETCH.PREFETCHT0PREFETCH.SW_L2PREF_RQSTS_DNPREF_RQSTS_UPRAT_STALLS.ANYRAT_STALLS.FLAGSRAT_STALLS.FPSWRAT_STALLS.PARTIAL_CYCLESRAT_STALLS.ROB_READ_PORTRESOURCE_STALLS.ANYRESOURCE_STALLS.BR_MISS_CLEARRESOURCE_STALLS.FPCWRESOURCE_STALLS.LD_STRESOURCE_STALLS.ROB_FULLRESOURCE_STALLS.RS_FULLRS_UOPS_DISPATCHEDRS_UOPS_DISPATCHED.PORT0RS_UOPS_DISPATCHED.PORT1RS_UOPS_DISPATCHED.PORT2RS_UOPS_DISPATCHED.PORT3RS_UOPS_DISPATCHED.PORT4RS_UOPS_DISPATCHED.PORT5SB_DRAIN_CYCLESSEGMENT_REG_LOADS.ANYSEG_REG_RENAMES.ANYSEG_REG_RENAMES.DSSEG_REG_RENAMES.ESSEG_REG_RENAMES.FSSEG_REG_RENAMES.GSSEG_RENAME_STALLS.ANYSEG_RENAME_STALLS.DSSEG_RENAME_STALLS.ESSEG_RENAME_STALLS.FSSEG_RENAME_STALLS.GSSIMD_ASSISTSIMD_INSTR_RETIREDSIMD_INST_RETIRED.ANYSIMD_INST_RETIRED.VECTORSIMD_SAT_INSTR_RETIREDSIMD_SAT_UOP_EXEC.ARSIMD_SAT_UOP_EXEC.SSIMD_UOPS_EXEC.ARSIMD_UOPS_EXEC.SSIMD_UOP_TYPE_EXEC.LOGICAL.ARSIMD_UOP_TYPE_EXEC.LOGICAL.SSIMD_UOP_TYPE_EXEC.MUL.ARSIMD_UOP_TYPE_EXEC.MUL.SSIMD_UOP_TYPE_EXEC.PACK.ARSIMD_UOP_TYPE_EXEC.PACK.SSIMD_UOP_TYPE_EXEC.SHIFT.ARSIMD_UOP_TYPE_EXEC.SHIFT.SSIMD_UOP_TYPE_EXEC.UNPACK.ARSIMD_UOP_TYPE_EXEC.UNPACK.SSNOOP_STALL_DRVSSE_PRE_EXEC.L2SSE_PRE_EXEC.STORESSSE_PRE_MISS.L1SSE_PRE_MISS.L2SSE_PRE_MISS.NTASTORE_BLOCK.ORDERSTORE_BLOCK.SNOOPSTORE_FORWARDS.GOODTHERMAL_TRIPUOPS_RETIRED.ANYUOPS_RETIRED.FUSEDUOPS_RETIRED.LD_IND_BRUOPS_RETIRED.MACRO_FUSIONUOPS_RETIRED.NON_FUSEDUOPS_RETIRED.STD_STAX87_COMP_OPS_EXE.ANY.ARX87_COMP_OPS_EXE.ANY.SX87_OPS_RETIRED.ANYX87_OPS_RETIRED.FXCHBAClearsBTB_MissesBr_BAC_Missp_ExecBr_BogusBr_Call_ExecBr_Call_Missp_ExecBr_Cnd_ExecBr_Cnd_Missp_ExecBr_Ind_Call_ExecBr_Ind_ExecBr_Ind_Missp_ExecBr_Inst_ExecBr_Instr_DecodedBr_Instr_RetBr_MisPred_RetBr_MisPred_Taken_RetBr_Missp_ExecBr_Ret_BAC_Missp_ExecBr_Ret_ExecBr_Ret_Missp_ExecBr_Taken_RetBus_BNR_ClocksBus_DRDY_ClocksBus_Data_RcvBus_Locks_ClocksBus_Not_In_UseBus_Req_OutstandingBus_Snoop_StallBus_SnoopsBus_Trans_AnyBus_Trans_BrdBus_Trans_BurstBus_Trans_DefBus_Trans_IOBus_Trans_IfetchBus_Trans_InvalBus_Trans_MemBus_Trans_PBus_Trans_PwrBus_Trans_RFOBus_Trans_WBCycles_Div_BusyCycles_Int_MaskedCycles_Int_Pending_MaskedDCU_Snoop_To_ShareDCache_Cache_LDDCache_Cache_LockDCache_Cache_STDCache_M_EvictDCache_M_ReplDCache_Pend_MissDCache_ReplData_Mem_Cache_RefData_Mem_RefDbus_BusyDbus_Busy_RdDivDtlb_MissESP_UopsEST_TransFP_AssistFP_Comp_Instr_RetFP_Comps_Op_ExeFP_MMX_TransFused_Ld_Uops_RetFused_St_Uops_RetFused_Uops_RetHW_Int_RxICache_MissesICache_ReadsIFU_Mem_StallILD_StallITLB_MissesInstr_DecodedInstr_RetL1_Pref_ReqL2_IFetchL2_Lines_InL2_Lines_OutL2_M_Lines_InL2_M_Lines_OutL2_No_Request_CyclesL2_Reject_CyclesL2_RqstsLD_BlocksLLC_MissesLLC_ReferenceMMX_AssistMMX_FP_TransMMX_Instr_ExecMMX_Instr_RetMisalign_Mem_RefMulNonHlt_Ref_CyclesPref_Rqsts_DnPref_Rqsts_UpResource_StallSD_DrainsSIMD_FP_DP_P_Comp_RetSIMD_FP_DP_P_RetSIMD_FP_DP_S_Comp_RetSIMD_FP_DP_S_RetSIMD_FP_SP_P_Comp_RetSIMD_FP_SP_RetSIMD_FP_SP_S_Comp_RetSIMD_FP_SP_S_RetSIMD_Int_128_RetSIMD_Int_Pari_ExecSIMD_Int_Pck_ExecSIMD_Int_Plog_ExecSIMD_Int_Pmul_ExecSIMD_Int_Psft_ExecSIMD_Int_Sat_ExecSIMD_Int_Upck_ExecSMC_DetectedSSE_NTStores_MissSSE_NTStores_RetSSE_PrefNta_MissSSE_PrefNta_RetSSE_PrefT1_MissSSE_PrefT1_RetSSE_PrefT2_MissSSE_PrefT2_RetSeg_Reg_LoadsSerial_Execution_CyclesThermal_TripUnfusionUnhalted_Core_CyclesUops_RetCYCLES_INT_MASKEDCYCLES_INT_PENDING_AND_MASKEDINST_RETIRED.VM_HL1D_CACHE_LDL1D_CACHE_STMACHINE_NUKES.SMCMACRO_INSTS.DECODEDMEM_LOAD_RETIRED.L1D_MISSPAGE_WALKS.COUNTSEGMENT_REG_LOADSSIMD_SAT_UOP_EXECSIMD_UOPS_EXECSIMD_UOP_TYPE_EXEC.ARITHMETICSIMD_UOP_TYPE_EXEC.LOGICALSIMD_UOP_TYPE_EXEC.MULSIMD_UOP_TYPE_EXEC.PACKSIMD_UOP_TYPE_EXEC.SHIFTSIMD_UOP_TYPE_EXEC.UNPACKSSE_PRE_EXEC.L1SSE_PRE_EXEC.NTASB_DRAIN.ANYSTORE_BLOCKS.AT_RETSTORE_BLOCKS.L1D_BLOCKPARTIAL_ADDRESS_ALIASDTLB_LOAD_MISSES.ANYDTLB_LOAD_MISSES.STLB_HITDTLB_LOAD_MISSES.PDE_MISSMEM_INST_RETIRED.LOADSMEM_INST_RETIRED.STORESMEM_STORE_RETIRED.DTLB_MISSUOPS_ISSUED.ANYUOPS_ISSUED.STALLED_CYCLESUOPS_ISSUED.FUSEDMEM_UNCORE_RETIRED.LOCAL_DRAMFP_COMP_OPS_EXE.X87FP_COMP_OPS_EXE.MMXFP_COMP_OPS_EXE.SSE_FPFP_COMP_OPS_EXE.SSE2_INTEGERFP_COMP_OPS_EXE.SSE_FP_PACKEDFP_COMP_OPS_EXE.SSE_FP_SCALARSIMD_INT_128.PACKED_MPYSIMD_INT_128.PACKED_SHIFTSIMD_INT_128.PACKSIMD_INT_128.UNPACKSIMD_INT_128.PACKED_LOGICALSIMD_INT_128.PACKED_ARITHSIMD_INT_128.SHUFFLE_MOVELOAD_DISPATCH.RSLOAD_DISPATCH.RS_DELAYEDLOAD_DISPATCH.MOBLOAD_DISPATCH.ANYARITH.CYCLES_DIV_BUSYARITH.MULINST_QUEUE_WRITESINST_DECODED.DEC0TWO_UOP_INSTS_DECODEDINST_QUEUE_WRITE_CYCLESLSD_OVERFLOWL2_RQSTS.LD_HITL2_RQSTS.LD_MISSL2_RQSTS.LOADSL2_RQSTS.RFO_HITL2_RQSTS.RFO_MISSL2_RQSTS.RFOSL2_RQSTS.IFETCH_HITL2_RQSTS.IFETCH_MISSL2_RQSTS.IFETCHESL2_RQSTS.PREFETCH_HITL2_RQSTS.PREFETCH_MISSL2_RQSTS.PREFETCHESL2_RQSTS.MISSL2_RQSTS.REFERENCESL2_DATA_RQSTS.DEMAND.I_STATEL2_DATA_RQSTS.DEMAND.S_STATEL2_DATA_RQSTS.DEMAND.E_STATEL2_DATA_RQSTS.DEMAND.M_STATEL2_DATA_RQSTS.DEMAND.MESIL2_DATA_RQSTS.PREFETCH.MESIL2_DATA_RQSTS.ANYL2_WRITE.RFO.I_STATEL2_WRITE.RFO.S_STATEL2_WRITE.RFO.M_STATEL2_WRITE.RFO.HITL2_WRITE.RFO.MESIL2_WRITE.LOCK.I_STATEL2_WRITE.LOCK.S_STATEL2_WRITE.LOCK.E_STATEL2_WRITE.LOCK.M_STATEL2_WRITE.LOCK.HITL2_WRITE.LOCK.MESIL1D_WB_L2.I_STATEL1D_WB_L2.S_STATEL1D_WB_L2.E_STATEL1D_WB_L2.M_STATEL1D_WB_L2.MESIL3_LAT_CACHE.REFERENCEL3_LAT_CACHE.MISSCPU_CLK_UNHALTED.THREAD_PCPU_CLK_UNHALTED.REF_PL1D_CACHE_LD.I_STATEL1D_CACHE_LD.S_STATEL1D_CACHE_LD.E_STATEL1D_CACHE_LD.M_STATEL1D_CACHE_LD.MESIL1D_CACHE_ST.S_STATEL1D_CACHE_ST.E_STATEL1D_CACHE_ST.M_STATEL1D_CACHE_LOCK.HITL1D_CACHE_LOCK.S_STATEL1D_CACHE_LOCK.E_STATEL1D_CACHE_LOCK.M_STATEL1D_ALL_REF.ANYL1D_ALL_REF.CACHEABLEDTLB_MISSES.WALK_COMPLETEDDTLB_MISSES.STLB_HITDTLB_MISSES.PDE_MISSL1D_PREFETCH.MISSL1D_PREFETCH.TRIGGERSL1D.REPLL1D.M_REPLL1D.M_EVICTL1D.M_SNOOP_EVICTL1D_CACHE_LOCK_FB_HITCACHE_LOCK_CYCLES.L1D_L2CACHE_LOCK_CYCLES.L1DIO_TRANSACTIONSL1I.HITSL1I.MISSESL1I.READSL1I.CYCLES_STALLEDLARGE_ITLB.HITITLB_MISSES.ANYITLB_MISSES.WALK_COMPLETEDILD_STALL.LCPILD_STALL.MRUILD_STALL.IQ_FULLILD_STALL.REGENILD_STALL.ANYBR_INST_EXEC.CONDBR_INST_EXEC.DIRECTBR_INST_EXEC.NON_CALLSBR_INST_EXEC.RETURN_NEARBR_INST_EXEC.DIRECT_NEAR_CALLBR_INST_EXEC.NEAR_CALLSBR_INST_EXEC.TAKENBR_INST_EXEC.ANYBR_MISP_EXEC.CONDBR_MISP_EXEC.DIRECTBR_MISP_EXEC.NON_CALLSBR_MISP_EXEC.RETURN_NEARBR_MISP_EXEC.DIRECT_NEAR_CALLBR_MISP_EXEC.NEAR_CALLSBR_MISP_EXEC.TAKENBR_MISP_EXEC.ANYRESOURCE_STALLS.LOADRESOURCE_STALLS.STORERESOURCE_STALLS.MXCSRRESOURCE_STALLS.OTHERMACRO_INSTS.FUSIONS_DECODEDBACLEAR_FORCE_IQLSD.UOPSITLB_FLUSHUOPS_EXECUTED.PORT0UOPS_EXECUTED.PORT1UOPS_EXECUTED.PORT2_COREUOPS_EXECUTED.PORT3_COREUOPS_EXECUTED.PORT4_COREUOPS_EXECUTED.PORT5UOPS_EXECUTED.PORT015UOPS_EXECUTED.PORT234OFFCORE_REQUESTS_SQ_FULLOFF_CORE_RESPONSE_0SNOOP_RESPONSE.HITSNOOP_RESPONSE.HITESNOOP_RESPONSE.HITMOFF_CORE_RESPONSE_1INST_RETIRED.X87INST_RETIRED.MMXUOPS_RETIRED.RETIRE_SLOTSUOPS_RETIRED.MACRO_FUSEDMACHINE_CLEARS.CYCLESMACHINE_CLEARS.MEM_ORDERBR_INST_RETIRED.ALL_BRANCHESBR_INST_RETIRED.CONDITIONALBR_INST_RETIRED.NEAR_CALLBR_MISP_RETIRED.ALL_BRANCHESBR_MISP_RETIRED.NEAR_CALLMEM_LOAD_RETIRED.L1D_HITMEM_LOAD_RETIRED.L3_MISSMEM_LOAD_RETIRED.HIT_LFBFP_MMX_TRANS.TO_FPFP_MMX_TRANS.TO_MMXFP_MMX_TRANS.ANYUOPS_DECODED.MSUOPS_DECODED.ESP_FOLDINGUOPS_DECODED.ESP_SYNCRAT_STALLS.REGISTERSRAT_STALLS.SCOREBOARDSEG_RENAME_STALLSES_REG_RENAMESUOP_UNFUSIONBPU_MISSED_CALL_RETBACLEAR.CLEARBACLEAR.BAD_TARGETBPU_CLEARS.EARLYBPU_CLEARS.LATEL2_TRANSACTIONS.LOADL2_TRANSACTIONS.RFOL2_TRANSACTIONS.IFETCHL2_TRANSACTIONS.PREFETCHL2_TRANSACTIONS.L1D_WBL2_TRANSACTIONS.FILLL2_TRANSACTIONS.WBL2_TRANSACTIONS.ANYL2_LINES_IN.S_STATEL2_LINES_IN.E_STATEL2_LINES_IN.ANYL2_LINES_OUT.DEMAND_CLEANL2_LINES_OUT.DEMAND_DIRTYL2_LINES_OUT.PREFETCH_CLEANL2_LINES_OUT.PREFETCH_DIRTYL2_LINES_OUT.ANYSQ_MISC.SPLIT_LOCKSQ_FULL_STALL_CYCLESFP_ASSIST.ALLFP_ASSIST.OUTPUTFP_ASSIST.INPUTSIMD_INT_64.PACKED_MPYSIMD_INT_64.PACKED_SHIFTSIMD_INT_64.PACKSIMD_INT_64.UNPACKSIMD_INT_64.PACKED_LOGICALSIMD_INT_64.PACKED_ARITHSIMD_INT_64.SHUFFLE_MOVESB_FORWARD.ANYLOAD_BLOCK.ADDRESS_OFFSETSB_DRAIN.CYCLESMISALIGN_MEM_REF.LOADMISALIGN_MEM_REF.STOREMISALIGN_MEM_REF.ANYSTORE_BLOCKS.NOT_STASTORE_BLOCKS.STASTORE_BLOCKS.ANYDTLB_LOAD_MISSES.PDP_MISSMEMORY_DISAMBIGURATION.RESETHW_INT.RCVHW_INT.CYCLES_MASKEDL2_WRITE.RFO.E_STATEUOPS_DECODED.DEC0L1D_CACHE_ST.I_STATEL1D_CACHE_ST.MESIDTLB_MISSES.PDP_MISSSSE_MEM_EXEC.NTASSE_MEM_EXEC.STREAMING_STORESSFENCE_CYCLESEPT.EPDE_MISSEPT.EPDPE_HITEPT.EPDPE_MISSIFU_IVC.FULLIFU_IVC.L1I_EVICTIONL1I_OPPORTUNISTIC_HITSITLB_MISSES.WALK_CYCLESITLB_MISSES.PMH_BUSY_CYCLESITLB_MISSES.STLB_HITITLB_MISSES.PDE_MISSITLB_MISSES.PDP_MISSOFFCORE_REQUESTS.DEMAND.RFOOFFCORE_REQUESTS.ANY.READOFFCORE_REQUESTS.ANY.RFOOFFCORE_REQUESTS.UNCACHED_MEMOFFCORE_REQUESTS.ANYPIC_ACCESSES.TPR_READSPIC_ACCESSES.TPR_WRITESMACHINE_CLEARS.FUSION_ASSISTBPU_CLEARS.ANYL2_HW_PREFETCH.HITL2_HW_PREFETCH.ALLOCL2_HW_PREFETCH.DATA_TRIGGERL2_HW_PREFETCH.CODE_TRIGGERL2_HW_PREFETCH.DCA_TRIGGERL2_HW_PREFETCH.KICK_STARTSQ_MISC.PROMOTIONSQ_MISC.PROMOTION_POST_GOSQ_MISC.LRU_HINTSSQ_MISC.FILL_DROPPEDLD_BLOCKS.DATA_UNKNOWNLD_BLOCKS.STORE_FORWARDLD_BLOCKS.NO_SRLD_BLOCKS.ALL_BLOCKMISALIGN_MEM_REF.LOADSMISALIGN_MEM_REF.STORESINT_MISC.RECOVERY_CYCLESINT_MISC.RAT_STALL_CYCLESSIMD_FP_256.PACKED_SINGLESIMD_FP_256.PACKED_DOUBLEARITH.FPU_DIV_ACTIVEINSTS_WRITTEN_TO_IQ.INSTSL2_RQSTS.DEMAND_DATA_RD_HITL2_RQSTS.ALL_DEMAND_DATA_RDL2_RQSTS.RFO_HITSL2_RQSTS.ALL_RFOL2_RQSTS.CODE_RD_HITL2_RQSTS.CODE_RD_MISSL2_RQSTS.ALL_CODE_RDL2_RQSTS.PF_HITL2_RQSTS.PF_MISSL2_RQSTS.ALL_PFL2_STORE_LOCK_RQSTS.MISSL2_STORE_LOCK_RQSTS.HIT_EL2_STORE_LOCK_RQSTS.HIT_ML2_STORE_LOCK_RQSTS.ALLL2_L1D_WB_RQSTS.HIT_EL2_L1D_WB_RQSTS.HIT_MLONGEST_LAT_CACHE.REFERENCELONGEST_LAT_CACHE.MISSL1D_PEND_MISS.PENDINGDTLB_STORE_MISSES.STLB_HITLOAD_HIT_PRE.SW_PFLOAD_HIT_PER.HW_PFHW_PRE_REQ.DL1_MISSL1D.REPLACEMENTL1D.ALLOCATED_IN_ML1D.EVICTIONL1D.ALL_M_REPLACEMENTRESOURCE_STALLS2.ALL_FL_EMPTYRESOURCE_STALLS2.BOB_FULLRESOURCE_STALLS2.OOO_RSRCCPL_CYCLES.RING0CPL_CYCLES.RING123RS_EVENTS.EMPTY_CYCLESIDQ.EMPTYIQD.MITE_UOPSIDQ.DSB_UOPSIDQ.MS_DSB_UOPSIDQ.MS_MITE_UOPSIDQ.MS_UOPSITLB_MISSES.WALK_DURATIONBR_INST_EXEC.DIRECT_JMPBR_INST_EXEC.NONTAKENBR_INST_EXE.ALL_BRANCHESBR_MISP_EXEC.NONTAKENBR_MISP_EXEC.ALL_BRANCHESIDQ_UOPS_NOT_DELIVERED.COREUOPS_DISPATCHED_PORT.PORT_0UOPS_DISPATCHED_PORT.PORT_1UOPS_DISPATCHED_PORT.PORT_2UOPS_DISPATCHED_PORT.PORT_3UOPS_DISPATCHED_PORT.PORT_4UOPS_DISPATCHED_PORT.PORT_5RESOURCE_STALLS.LBRESOURCE_STALLS.SBRESOURCE_STALLS.ROBRESOURCE_STALLS.FCSWDSB2MITE_SWITCHES.COUNTDSB_FILL.OTHER_CANCELDSB_FILL.EXCEED_DSB_LINESDSB_FILL.ALL_CANCELITLB.ITLB_FLUSHOFFCORE_REQUESTS.DEMAND_RFOOFFCORE_REQUESTS.ALL_DATA_RDUOPS_DISPATCHED.THREADUOPS_DISPATCHED.COREAGU_BYPASS_CANCEL.COUNTTLB_FLUSH.DTLB_THREADTLB_FLUSH.STLB_ANYINST_RETIRED.PREC_DISTOTHER_ASSISTS.AVX_STOREOTHER_ASSISTS.AVX_TO_SSEOTHER_ASSISTS.SSE_TO_AVXUOPS_RETIRED.ALLMACHINE_CLEARS.MASKMOVBR_INST_RETIRED.ALL_BRANCHBR_INST_RETIRED.NEAR_RETURNBR_INST_RETIRED.NOT_TAKENBR_INST_RETIRED.NEAR_TAKENBR_INST_RETIRED.FAR_BRANCHBR_MISP_RETIRED.CONDITIONALBR_MISP_RETIRED.NOT_TAKENBR_MISP_RETIRED.TAKENFP_ASSIST.X87_OUTPUTFP_ASSIST.X87_INPUTFP_ASSIST.SIMD_OUTPUTFP_ASSIST.SIMD_INPUTFP_ASSIST.ANYROB_MISC_EVENTS.LBR_INSERTSMEM_UOP_RETIRED.LOADSMEM_UOP_RETIRED.STORESMEM_UOP_RETIRED.STLB_MISSMEM_UOP_RETIRED.LOCKMEM_UOP_RETIRED.SPLITMEM_UOP_RETIRED_ALLMEM_LOAD_UOPS_RETIRED.L1_HITMEM_LOAD_UOPS_RETIRED.L2_HITMEM_LOAD_UOPS_RETIRED.LLC_HITMEM_LOAD_UOPS_RETIRED.HIT_LFBL2_TRANS.DEMAND_DATA_RDL2_TRANS.RF0L2_TRANS.CODE_RDL2_TRANS.ALL_PFL2_TRANS.L1D_WBL2_TRANS.L2_FILLL2_TRANS.L2_WBL2_TRANS.ALL_REQUESTSL2_LINES_IN.IL2_LINES_IN.SL2_LINES_IN.EL2_LINES-IN.ALLL2_LINES_OUT.PF_CLEANL2_LINES_OUT.PF_DIRTYL2_LINES_OUT.DIRTY_ALLMISALIGN_MEMORY.STOREDTLB_LOAD_MISSES.WALK_CYCLESMEM_UNCORE_RETIRED.LOCAL_HITMDTLB_MISSES.WALK_CYCLESEPT.WALK_CYCLESSNOOPQ_REQUESTS.CODESNOOPQ_REQUESTS.DATASNOOPQ_REQUESTS.INVALIDATEBR_INST_RETIRED.ANY_PBR_MISP_RETIRED.ANY_PUOPS_DECODED.STALL_CYCLESTHREAD_ACTIVEUCLOCKGQ_CYCLES_FULL.READ_TRACKERGQ_CYCLES_FULL.WRITE_TRACKERGQ_ALLOC.READ_TRACKERGQ_ALLOC.RT_L3_MISSGQ_ALLOC.RT_TO_L3_RESPGQ_ALLOC.RT_TO_RTID_ACQUIREDGQ_ALLOC.WT_TO_RTID_ACQUIREDGQ_ALLOC.WRITE_TRACKERGQ_ALLOC.PEER_PROBE_TRACKERGQ_DATA.FROM_QPIGQ_DATA.FROM_QMCGQ_DATA.FROM_L3GQ_DATA.FROM_CORES_02GQ_DATA.FROM_CORES_13GQ_DATA.TO_QPI_QMCGQ_DATA.TO_L3GQ_DATA.TO_CORESSNP_RESP_TO_LOCAL_HOME.WBSNP_RESP_TO_REMOTE_HOME.WBSNP_RESP_TO_REMOTE_HOME.HITML3_HITS.READL3_HITS.WRITEL3_HITS.PROBEL3_HITS.ANYL3_MISS.READL3_MISS.WRITEL3_MISS.PROBEL3_MISS.ANYL3_LINES_IN.M_STATEL3_LINES_IN.E_STATEL3_LINES_IN.S_STATEL3_LINES_IN.F_STATEL3_LINES_IN.ANYL3_LINES_OUT.M_STATEL3_LINES_OUT.E_STATEL3_LINES_OUT.S_STATEL3_LINES_OUT.I_STATEL3_LINES_OUT.F_STATEL3_LINES_OUT.ANYQHL_REQUESTS.IOH_READSQHL_REQUESTS.IOH_WRITESQHL_REQUESTS.REMOTE_READSQHL_REQUESTS.REMOTE_WRITESQHL_REQUESTS.LOCAL_READSQHL_REQUESTS.LOCAL_WRITESQHL_CYCLES_FULL.IOHQHL_CYCLES_FULL.REMOTEQHL_CYCLES_FULL.LOCALQHL_CYCLES_NOT_EMPTY.IOHQHL_CYCLES_NOT_EMPTY.REMOTEQHL_CYCLES_NOT_EMPTY.LOCALQHL_OCCUPANCY.IOHQHL_OCCUPANCY.REMOTEQHL_OCCUPANCY.LOCALQHL_ADDRESS_CONFLICTS.2WAYQHL_ADDRESS_CONFLICTS.3WAYQHL_CONFLICT_CYCLES.IOHQHL_CONFLICT_CYCLES.REMOTEQHL_CONFLICT_CYCLES.LOCALQHL_TO_QMC_BYPASSQMC_NORMAL_FULL.READ.CH0QMC_NORMAL_FULL.READ.CH1QMC_NORMAL_FULL.READ.CH2QMC_NORMAL_FULL.WRITE.CH0QMC_NORMAL_FULL.WRITE.CH1QMC_NORMAL_FULL.WRITE.CH2QMC_ISOC_FULL.READ.CH0QMC_ISOC_FULL.READ.CH1QMC_ISOC_FULL.READ.CH2QMC_ISOC_FULL.WRITE.CH0QMC_ISOC_FULL.WRITE.CH1QMC_ISOC_FULL.WRITE.CH2QMC_BUSY.READ.CH0QMC_BUSY.READ.CH1QMC_BUSY.READ.CH2QMC_BUSY.WRITE.CH0QMC_BUSY.WRITE.CH1QMC_BUSY.WRITE.CH2QMC_OCCUPANCY.CH0QMC_OCCUPANCY.CH1QMC_OCCUPANCY.CH2QMC_ISSOC_OCCUPANCY.CH0QMC_ISSOC_OCCUPANCY.CH1QMC_ISSOC_OCCUPANCY.CH2QMC_ISSOC_READS.ANYQMC_NORMAL_READS.CH0QMC_NORMAL_READS.CH1QMC_NORMAL_READS.CH2QMC_NORMAL_READS.ANYQMC_HIGH_PRIORITY_READS.CH0QMC_HIGH_PRIORITY_READS.CH1QMC_HIGH_PRIORITY_READS.CH2QMC_HIGH_PRIORITY_READS.ANYQMC_WRITES.FULL.CH0QMC_WRITES.FULL.CH1QMC_WRITES.FULL.CH2QMC_WRITES.FULL.ANYQMC_WRITES.PARTIAL.CH0QMC_WRITES.PARTIAL.CH1QMC_WRITES.PARTIAL.CH2QMC_WRITES.PARTIAL.ANYQMC_CANCEL.CH0QMC_CANCEL.CH1QMC_CANCEL.CH2QMC_CANCEL.ANYQMC_PRIORITY_UPDATES.CH0QMC_PRIORITY_UPDATES.CH1QMC_PRIORITY_UPDATES.CH2QMC_PRIORITY_UPDATES.ANYQHL_FRC_ACK_CNFLTS.LOCALQPI_TX_HEADER.BUSY.LINK_0QPI_TX_HEADER.BUSY.LINK_1DRAM_OPEN.CH0DRAM_OPEN.CH1DRAM_OPEN.CH2DRAM_PAGE_CLOSE.CH0DRAM_PAGE_CLOSE.CH1DRAM_PAGE_CLOSE.CH2DRAM_PAGE_MISS.CH0DRAM_PAGE_MISS.CH1DRAM_PAGE_MISS.CH2DRAM_READ_CAS.CH0DRAM_READ_CAS.AUTOPRE_CH0DRAM_READ_CAS.CH1DRAM_READ_CAS.AUTOPRE_CH1DRAM_READ_CAS.CH2DRAM_READ_CAS.AUTOPRE_CH2DRAM_WRITE_CAS.CH0DRAM_WRITE_CAS.AUTOPRE_CH0DRAM_WRITE_CAS.CH1DRAM_WRITE_CAS.AUTOPRE_CH1DRAM_WRITE_CAS.CH2DRAM_WRITE_CAS.AUTOPRE_CH2DRAM_REFRESH.CH0DRAM_REFRESH.CH1DRAM_REFRESH.CH2DRAM_PRE_ALL.CH0DRAM_PRE_ALL.CH1DRAM_PRE_ALL.CH2CB0_XSNP_RESPONSE.RSPIHITICB0_XSNP_RESPONSE.RSPIHITFSECB0_XSNP_RESPONSE.RSPSHITFSECB0_XSNP_RESPONSE.RSPSFWDMCB0_XSNP_RESPONSE.AND_XCORECB0_XSNP_RESPONSE_AND_XCORE2CB0_CACHE_LOOKUP.MCB0_CACHE_LOOKUP.ECB0_CACHE_LOOKUP.SCB0_CACHE_LOOKUP.ICB0_CACHE_LOOKUP.AND_READCB0_CACHE_LOOKUP_AND_READ2CB0_CACHE_LOOKUP.AND_EXTSNPCB0_CACHE_LOOKUP.AND_ANYIMPH_CB0_TRK_OCCUPANCY.ALLIMPH_CB0_TRK_REQUEST.ALLIMPH_CB0_TRK_REQUEST.WRITESIMPH_C0H_TRK_OCCUPANCY.ALLIMPC_C0H_TRK_REQUEST.ALLGQ_OCCUPANCY.READ_TRACKERGQ_SNOOP.GOTO_SGQ_SNOOP.GOTO_IGQ_SNOOP.GOTO_S_HIT_EGQ_SNOOP.GOTO_S_HIT_FGQ_SNOOP.GOTO_S_HIT_MGQ_SNOOP.GOTO_S_HIT_SGQ_SNOOP.GOTO_I_HIT_EGQ_SNOOP.GOTO_I_HIT_FGQ_SNOOP.GOTO_I_HIT_MGQ_SNOOP.GOTO_I_HIT_SQMC_OCCUPANCY.ANYIMC_RETRY.CH0IMC_RETRY.CH1IMC_RETRY.CH2IMC_RETRY.ANYQHL_FRC_ACK_CNFLTS.IOHQHL_FRC_ACK_CNFLTS.REMOTEQHL_FRC_ACK_CNFLTS.ANYQHL_SLEEPS.IOH_ORDERQHL_SLEEPS.REMOTE_ORDERQHL_SLEEPS.LOCAL_ORDERQHL_SLEEPS.IOH_CONFLICTQHL_SLEEPS.REMOTE_CONFLICTQHL_SLEEPS.LOCAL_CONFLICTADDR_OPCODE_MATCH.IOHADDR_OPCODE_MATCH.REMOTEADDR_OPCODE_MATCH.LOCALQPI_TX_HEADER.FULL.LINK_0QPI_TX_HEADER.FULL.LINK_1DRAM_THERMAL_THROTTLEDTHERMAL_THROTTLED_TEMP.CORE_0THERMAL_THROTTLED_TEMP.CORE_1THERMAL_THROTTLED_TEMP.CORE_2THERMAL_THROTTLED_TEMP.CORE_3PROCHOT_ASSERTIONTURBO_MODE.CORE_0TURBO_MODE.CORE_1TURBO_MODE.CORE_2TURBO_MODE.CORE_3CYCLES_UNHALTED_L3_FLL_ENABLEDC_ACCESSESDC_MISSESDC_REFILLS_FROM_L2DC_REFILLS_FROM_SYSTEMDC_WRITEBACKSL1_DTLB_MISS_AND_L2_DTLB_HITSL1_AND_L2_DTLB_MISSESMISALIGNED_REFERENCESIC_FETCHESIC_MISSESL1_ITLB_MISSESL1_L2_ITLB_MISSESRETIRED_INSTRUCTIONSRETIRED_OPSRETIRED_BRANCHESRETIRED_BRANCHES_MISPREDICTEDRETIRED_TAKEN_BRANCHESRETIRED_FAR_CONTROL_TRANSFERSRETIRED_RESYNC_BRANCHESINTERRUPTS_MASKED_CYCLESHARDWARE_INTERRUPTSFP_DISPATCHED_FPU_OPSLS_SEGMENT_REGISTER_LOADLS_BUFFER2_FULLLS_LOCKED_OPERATIONLS_RETIRED_CPUID_INSTRUCTIONSDC_ACCESSDC_MISSDC_REFILL_FROM_L2DC_REFILL_FROM_SYSTEMDC_COPYBACKDC_MISALIGNED_DATA_REFERENCEDC_ONE_BIT_ECC_ERRORDC_DCACHE_ACCESSES_BY_LOCKSBU_CPU_CLK_UNHALTEDBU_INTERNAL_L2_REQUESTBU_FILL_REQUEST_L2_MISSBU_FILL_INTO_L2IC_FETCHIC_MISSIC_REFILL_FROM_L2IC_REFILL_FROM_SYSTEMIC_INSTRUCTION_FETCH_STALLIC_RETURN_STACK_HITIC_RETURN_STACK_OVERFLOWFR_RETIRED_X86_INSTRUCTIONSFR_RETIRED_UOPSFR_RETIRED_BRANCHESFR_RETIRED_TAKEN_BRANCHESFR_RETIRED_RESYNCSFR_RETIRED_NEAR_RETURNSFR_RETIRED_FPU_INSTRUCTIONSFR_INTERRUPTS_MASKED_CYCLESFR_TAKEN_HARDWARE_INTERRUPTSFR_DECODER_EMPTYFR_DISPATCH_STALLSFR_FPU_EXCEPTIONSNB_SIZED_COMMANDSNB_PROBE_RESULTNB_HT_BUS0_BANDWIDTHNB_HT_BUS1_BANDWIDTHNB_HT_BUS2_BANDWIDTHTC_DELIVER_MODEBPU_FETCH_REQUESTITLB_REFERENCEMEMORY_CANCELMEMORY_COMPLETELOAD_PORT_REPLAYSTORE_PORT_REPLAYMOB_LOAD_REPLAYPAGE_WALK_TYPEBSQ_CACHE_REFERENCEIOQ_ALLOCATIONIOQ_ACTIVE_ENTRIESFSB_DATA_ACTIVITYBSQ_ALLOCATIONBSQ_ACTIVE_ENTRIESSSE_INPUT_ASSISTPACKED_SP_UOPPACKED_DP_UOPSCALAR_SP_UOPSCALAR_DP_UOP64BIT_MMX_UOP128BIT_MMX_UOPX87_FP_UOPX87_SIMD_MOVES_UOPGLOBAL_POWER_EVENTSTC_MS_XFERUOP_QUEUE_WRITESRETIRED_MISPRED_BRANCH_TYPERETIRED_BRANCH_TYPERESOURCE_STALLWC_BUFFERB2B_CYCLESBNRSNOOPRESPONSEFRONT_END_EVENTEXECUTION_EVENTREPLAY_EVENTINSTR_RETIREDUOPS_RETIREDUOP_TYPEBRANCH_RETIREDMISPRED_BRANCH_RETIREDX87_ASSISTMACHINE_CLEARDATA_READDATA_WRITEDATA_TLB_MISSDATA_READ_MISSDATA_WRITE_MISSDATA_CACHE_LINES_WRITTEN_BACKEXTERNAL_SNOOPSMEMORY_ACCESSES_IN_BOTH_PIPESBANK_CONFLICTSCODE_READCODE_TLB_MISSCODE_CACHE_MISSANY_SEGMENT_REGISTER_LOADEDBRANCHESBTB_HITSTAKEN_BRANCH_OR_BTB_HITPIPELINE_FLUSHESINSTRUCTIONS_EXECUTEDINSTRUCTIONS_EXECUTED_V_PIPEBUS_CYCLE_DURATIONLOCKED_BUS_CYCLEIO_READ_OR_WRITE_CYCLENONCACHEABLE_MEMORY_READSPIPELINE_AGI_STALLSFLOPSDATA_READ_OR_WRITEDATA_READ_MISS_OR_WRITE_MISSBUS_OWNERSHIP_LATENCYBUS_OWNERSHIP_TRANSFERSCACHE_M_LINE_SHARINGCACHE_LINE_SHARINGEMMS_INSTRUCTIONS_EXECUTEDWRITES_TO_NONCACHEABLE_MEMORYSATURATIONS_PERFORMEDMMX_INSTRUCTION_DATA_READSTAKEN_BRANCHESMMX_INSTRUCTION_DATA_WRITESPREDICTED_RETURNSMMX_MULTIPLY_UNIT_INTERLOCKRETURNSBTB_FALSE_ENTRIESDATA_MEM_REFSDCU_LINES_INDCU_M_LINES_INDCU_M_LINES_OUTDCU_MISS_OUTSTANDINGIFU_FETCHIFU_FETCH_MISSITLB_MISSIFU_MEM_STALLL2_M_LINES_INML2_M_LINES_OUTML2_DBUS_BUSYBUS_REQ_OUTSTANDINGBUS_TRAN_BRDBUS_TRAN_RFOBUS_TRAN_IFETCHBUS_TRAN_INVALBUS_TRAN_PWRBUS_TRAN_DEFBUS_TRAN_BURSTBUS_TRAN_ANYBUS_TRAN_MEMBUS_SNOOP_STALLFP_COMPS_OPS_EXELD_BLOCKSSB_DRAINSMISALIGN_MEM_REFEMON_KNI_PREF_DISPATCHEDEMON_KNI_PREF_MISSINST_RETIREDINST_DECODEDEMON_KNI_INST_RETIREDEMON_KNI_COMP_INST_RETHW_INT_RXBR_INST_RETIREDBR_MISS_PRED_RETIREDBR_TAKEN_RETIREDBR_MISS_PRED_TAKEN_RETBTB_MISSESBR_BOGUSRESOURCE_STALLSPARTIAL_RAT_STALLSCPU_CLK_UNHALTEDMMX_INSTR_EXECMMX_SAT_INSTR_EXECMMX_UOPS_EXECMMX_INSTR_TYPE_EXECFP_MMX_TRANSMMX_ASSISTMMX_INSTR_RETSEG_REG_RENAMESRET_SEG_RENAMESEMON_EST_TRANSEMON_THERMAL_TRIPEMON_SIMD_INSTR_RETIREDEMON_SYNCH_UOPSEMON_ESP_UOPSEMON_FUSED_UOPS_RETEMON_UNFUSIONEMON_PREF_RQSTS_UPEMON_PREF_RQSTS_DNEMON_SSE_SSE2_INST_RETIREDDATA_DEPENDENCY_STALLEDDTLB_MISSBRANCH_MISPREDDC_FULL_CYCLEDC_FULL_CONTIGDC_WRITEBACKPC_CHANGEBRANCH_RETIRED_ALLINSTR_CYCLECP_STALLPC_CHANGE_ALLPIPELINE_FLUSHBACKEND_STALLMULTIPLIER_USEMULTIPLIER_STALLEDDATA_CACHE_STALLEDL2_CACHE_REQL2_CACHE_MISSADDRESS_BUS_TRANSSELF_ADDRESS_BUS_TRANSDATA_BUS_TRANSCYCLEINSTR_EXECUTEDBRANCH_COMPLETEDRETURNRETURN_MISPREDRETURN_NOT_31RETURN_NOTPREDITLB_ACCESSDTLB_ACCESSJTLB_IACCESSJTLB_IMISSJTLB_DACCESSJTLB_DMISSDC_LOADSTORESTORE_MISSLOAD_MISSINTEGER_COMPLETEDFP_COMPLETEDLOAD_COMPLETEDSTORE_COMPLETEDBARRIER_COMPLETEDMIPS16_COMPLETEDNOP_COMPLETEDINTEGER_MULDIV_COMPLETEDRF_STALLINSTR_REFETCHSTORE_COND_COMPLETEDSTORE_COND_FAILEDICACHE_REQUESTSICACHE_HITL2_WRITEBACKL2_ACCESSL2_MISSL2_ERR_CORRECTEDEXCEPTIONSRF_CYCLES_STALLEDIFU_CYCLES_STALLEDALU_CYCLES_STALLEDUNCACHED_LOADUNCACHED_STORECP2_REG_TO_REG_COMPLETEDMFTC_COMPLETEDIC_BLOCKED_CYCLESDC_BLOCKED_CYCLESL2_IMISS_STALL_CYCLESL2_DMISS_STALL_CYCLESDMISS_CYCLESL2_MISS_CYCLESUNCACHED_BLOCK_CYCLESMDU_STALL_CYCLESFPU_STALL_CYCLESCP2_STALL_CYCLESCOREXTEND_STALL_CYCLESISPRAM_STALL_CYCLESDSPRAM_STALL_CYCLESCACHE_STALL_CYCLESLOAD_TO_USE_STALLSBASE_MISPRED_STALLSCPO_READ_STALLSBRANCH_MISPRED_CYCLESIFETCH_BUFFER_FULLFETCH_BUFFER_ALLOCATEDEJTAG_ITRIGGEREJTAG_DTRIGGERFSB_LT_QUARTERFSB_QUARTER_TO_HALFFSB_GT_HALFFSB_FULL_PIPELINE_STALLSLDQ_LT_QUARTERLDQ_QUARTER_TO_HALFLDQ_GT_HALFLDQ_FULL_PIPELINE_STALLSWBB_LT_QUARTERWBB_QUARTER_TO_HALFWBB_GT_HALFWBB_FULL_PIPELINE_STALLSREQUEST_LATENCYREQUEST_COUNTINSTR_COMPLETEDTLB_BIT_TRANSITIONSINSTR_DISPATCHEDPMON_EXCEPTPMON_SIGVPU_INSTR_COMPLETEDVFPU_INSTR_COMPLETEDVIU1_INSTR_COMPLETEDVIU2_INSTR_COMPLETEDMTVSCR_INSTR_COMPLETEDMTVRSAVE_INSTR_COMPLETEDVPU_INSTR_WAIT_CYCLESVFPU_INSTR_WAIT_CYCLESVIU1_INSTR_WAIT_CYCLESVIU2_INSTR_WAIT_CYCLESMFVSCR_SYNC_CYCLESVSCR_SAT_SETSTORE_INSTR_COMPLETEDL1_INSTR_CACHE_MISSESL1_DATA_SNOOPSUNRESOLVED_BRANCHESSPEC_BUFFER_CYCLESBRANCH_UNIT_STALL_CYCLESTRUE_BRANCH_TARGET_HITSBRANCH_LINK_STAC_PREDICTEDGPR_ISSUE_QUEUE_DISPATCHESCYCLES_THREE_INSTR_DISPATCHEDCYCLES_NO_COMPLETED_INSTRSIU2_INSTR_COMPLETEDBRANCHES_COMPLETEDEIEIO_INSTR_COMPLETEDMTSPR_INSTR_COMPLETEDSC_INSTR_COMPLETEDLS_LM_COMPLETEDITLB_HW_TABLE_SEARCH_CYCLESL1_INSTR_CACHE_ACCESSESINSTR_BKPT_MATCHESL1_DATA_SNOOP_HIT_ON_MODIFIEDLOAD_MISS_ALIASLOAD_MISS_ALIAS_ON_TOUCHTOUCH_ALIASL1_DATA_SNOOP_HIT_CASTOUTL1_DATA_SNOOP_HITSWRITE_THROUGH_STORESCACHE_INHIBITED_STORESL1_DATA_LOAD_HITL1_DATA_TOUCH_HITL1_DATA_STORE_HITL1_DATA_TOTAL_HITSDST_INSTR_DISPATCHEDREFRESHED_DSTSSUCCESSFUL_DST_TABLE_SEARCHESDSS_INSTR_COMPLETEDVTQ_LINE_FETCH_HITVEC_LOAD_INSTR_COMPLETEDFPU_RENORMALIZATIONFPU_DENORMALIZATIONFP_STORE_CAUSES_STALL_IN_LSULD_ST_TRUE_ALIAS_STALLLSU_INDEXED_ALIAS_STALLLSU_ALIAS_VS_FSQ_WB0_WB1LSU_ALIAS_VS_CSQLSU_TOUCH_ALIAS_VS_CSQLSU_LMQ_FULL_STALLLSU_RA_LATCH_STALLLSU_LMQ_INDEX_ALIASLSU_STORE_QUEUE_INDEX_ALIASLSU_CSQ_FORWARDINGLSU_MISALIGNED_LOAD_FINISHLSU_MISALIGN_STORE_COMPLETEDLSU_MISALIGN_STALLFP_ALL_FPSCR_RENAMES_BUSYFP_DENORMALIZED_RESULTL1_DATA_TOTAL_MISSESDISPATCHES_TO_FPR_ISSUE_QUEUELSU_INSTR_COMPLETEDLOAD_INSTR_COMPLETEDSS_SM_INSTR_COMPLETEDTLBIE_INSTR_COMPLETEDLWARX_INSTR_COMPLETEDMFSPR_INSTR_COMPLETEDREFETCH_SERIALIZATIONCYCLES_ONE_INSTR_DISPATCHEDCYCLES_TWO_INSTR_COMPLETEDITLB_NON_SPECULATIVE_MISSESL1_DATA_LOAD_ACCESS_MISSL1_DATA_TOUCH_MISSL1_DATA_STORE_MISSL1_DATA_TOUCH_MISS_CYCLESL1_DATA_CYCLES_USEDVTQ_RESUMES_DUE_TO_CTX_CHANGEVTQ_LINE_FETCH_MISSVTQ_LINE_FETCHTLBIE_SNOOPSL1_INSTR_CACHE_RELOADSL1_DATA_CACHE_RELOADSL1_DATA_CACHE_CASTOUTS_TO_L2STORE_MERGE_GATHERDATA_BKPT_MATCHESBPU_STALL_ON_LR_DEPENDENCYBTIC_MISSFPR_ISSUE_STALLEDSWITCHES_BETWEEN_PRIV_USERLSU_COMPLETES_FP_STORE_SINGLEVR_ISSUE_QUEUE_DISPATCHESVR_STALLSFPR_ISSUE_QUEUE_ENTRIESFPU_INSTR_COMPLETEDSTWCX_INSTR_COMPLETEDLS_LM_INSTR_PIECESDTLB_MISSESL1_DATA_CACHE_OP_HITL1_DATA_LOAD_MISS_CYCLESL1_DATA_PUSHESL1_DATA_TOTAL_MISSVT2_FETCHESTAKEN_BRANCHES_PROCESSEDBRANCH_FLUSHESFAST_BTIC_HITCYCLES_THREE_INSTR_COMPLETEDCYCLES_NO_INSTR_DISPATCHEDGPR_ISSUE_QUEUE_STALLEDIU1_INSTR_COMPLETEDDSSALL_INSTR_COMPLETEDTLBSYNC_INSTR_COMPLETEDSYNC_INSTR_COMPLETEDSS_SM_INSTR_PIECESDTLB_HW_SEARCH_CYCLESSNOOP_RETRIESSUCCESSFUL_STWCXMISPREDICTED_BRANCHESFOLDED_BRANCHESL2_CACHE_HITSL3_CACHE_HITSL2_INSTR_CACHE_MISSESL3_INSTR_CACHE_MISSESL2_DATA_CACHE_MISSESL3_DATA_CACHE_MISSESL2_LOAD_HITSL2_STORE_HITSL3_LOAD_HITSL3_STORE_HITSL2_TOUCH_HITSL3_TOUCH_HITSSNOOP_MODIFIEDSNOOP_VALIDINTERVENTIONL2_CACHE_MISSESL3_CACHE_MISSESL2_CACHE_CASTOUTSL3_CACHE_CASTOUTSL2SQ_FULL_CYCLESL3SQ_FULL_CYCLESRAQ_FULL_CYCLESWAQ_FULL_CYCLESL1_EXTERNAL_INTERVENTIONSL2_EXTERNAL_INTERVENTIONSL3_EXTERNAL_INTERVENTIONSEXTERNAL_INTERVENTIONSEXTERNAL_PUSHESEXTERNAL_SNOOP_RETRYDTQ_FULL_CYCLESBUS_RETRYL2_VALID_REQUESTBORDQ_FULLBUS_TAS_FOR_READSBUS_TAS_FOR_WRITESBUS_READS_NOT_RETRIEDBUS_WRITES_NOT_RETRIEDBUS_READS_WRITES_NOT_RETRIEDBUS_RETRY_DUE_TO_L1_RETRYBUS_RETRY_DUE_TO_COLLISIONSNOOP_REQUESTSPREFETCH_ENGINE_REQUESTPREFETCH_ENGINE_FULLTSCSTANDALONETHREADUNKNOWNAMD_K7AMD_K8INTEL_P5INTEL_P6INTEL_CLINTEL_PIIINTEL_PIIIINTEL_PMINTEL_PIVINTEL_COREINTEL_CORE2INTEL_CORE2EXTREMEINTEL_ATOMINTEL_COREI7INTEL_WESTMEREINTEL_SANDYBRIDGEINTEL_XSCALEMIPS_24KPPC_7450GENERICK7K8P5P6P4IAFIAPUCFUCPXSCALEMIPS24KPPC7450SOFTINTERRUPTUSERSYSTEMEDGETHRESHOLDREADWRITEINVERTQUALIFIERPRECISETAGGINGCASCADESOFT-TSC-branchesk8-fr-retired-taken-branchesbranch-mispredictscyclestscdc-missesk8-dc-missic-missesk8-ic-missinstructionsinterruptsunhalted-cyclesk8-bu-cpu-clk-unhaltedK8-iap-br-inst-retired.anyiap-br-inst-retired.mispredtsc-tsciap-l1i-missesiaf-instr-retired.anyiap-hw-int-rcviaf-cpu-clk-unhalted.coreIAF-iap-inst-retired.any_piap-cpu-clk-unhalted.core_pIAP-iap-br-instr-retiap-br-mispred-retiap-icache-missesiap-instr-retiap-core-hw-int-rxiap-unhalted-core-cyclesUCF-UCP-p4-mispred-branch-retiredp4-global-power-eventsP4-SOFT-CLOCK.HARDdddbdibdbbbiidibtcmisshitmisshit-ucst-rb-full64k-conflscsscsplit-ldsplit-stno-stano-stdpartial-dataunalgn-addrdtmissitmissrd-2ndl-hitsrd-2ndl-hiterd-2ndl-hitmrd-3rdl-hitsrd-3rdl-hiterd-3rdl-hitmrd-2ndl-missrd-3rdl-misswr-2ndl-missall-readall-writemem-ucmem-wcmem-wtmem-wpmem-wbownotherprefetchdrdy-drvdrdy-owndrdy-otherdbsy-drvdbsy-owndbsy-otherreq-type0req-type1req-len0req-len1req-io-typereq-lock-typereq-cache-typereq-split-typereq-dem-typereq-ord-typemem-type0mem-type1mem-type2allallp0allp2runningciscfrom-tc-buildfrom-tc-deliverfrom-romconditionalcallreturnindirectretiredsbfullwcb-evictswcb-full-evictnbogusbogusnbogus0nbogus1nbogus2nbogus3bogus0bogus1bogus2bogus3nbogusntagnbogustagbogusntagbogustagtagloadstagstoresmmnpmmnmmmtpmmtmfpsufpsopoaopoaupreaclearmoclearsmclearthisonlyexcludeisemfrequencycleanhitmcmp2scmp2iDMND_DATA_RDDMND_RFODMND_IFETCHWBPF_DATA_RDPF_RFOPF_IFETCHOTHERUNCORE_HITOTHER_CORE_HIT_SNPOTHER_CORE_HITMREMOTE_CACHE_FWDREMOTE_DRAMLOCAL_DRAMNON_DRAMadd-pipe-excluding-junk-opsstore-pipe-excluding-junk-opsadd-pipe-junk-opsmultiply-pipe-junk-opsstore-pipe-junk-opsescsssdsfsgshslocked-instructionscycles-in-requestcycles-to-completeinvalidsharedexclusiveownermodifiedscrubberpiggybackloadstorentaaccessesmissesic-filldc-filltlb-reloadtag-snoopcancelleddirty-l2-victimvictim-from-l2x87mmx-3dnowpacked-sse-sse2scalar-sse-sse2low-op-pos-0low-op-pos-1low-op-pos-2x87-reclass-microfaultssse-retype-microfaultssse-reclass-microfaultssse-and-x87-microtrapspage-hitpage-misspage-conflictdimm-turnaroundread-to-write-turnaroundwrite-to-read-turnarounddram-controller-queue-bypassnonpostwrszbytenonpostwrszdwordpostwrszbytepostwrszdwordrdszbyterdszdwordrdmodwrprobe-missprobe-hitcommanddatabuffer-releasenopBR_INST_RETIRED.MISPRED_NOT_TAKENBR_INST_RETIRED.PRED_NOT_TAKENCYCLES_INT_MASKED.CYCLES_INT_MASKEDCYCLES_INT_MASKED.CYCLES_INT_PENDING_AND_MASKEDSIMD_COMP_INST_RETIRED.PACKED_DOUBLESIMD_COMP_INST_RETIRED.PACKED_SINGLESIMD_COMP_INST_RETIRED.SCALAR_DOUBLESIMD_COMP_INST_RETIRED.SCALAR_SINGLESIMD_INST_RETIRED.PACKED_DOUBLESIMD_INST_RETIRED.PACKED_SINGLESIMD_INST_RETIRED.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