Current Path : /usr/src/lib/clang/libllvmarmcodegen/ |
FreeBSD hs32.drive.ne.jp 9.1-RELEASE FreeBSD 9.1-RELEASE #1: Wed Jan 14 12:18:08 JST 2015 root@hs32.drive.ne.jp:/sys/amd64/compile/hs32 amd64 |
Current File : //usr/src/lib/clang/libllvmarmcodegen/Makefile |
# $FreeBSD: release/9.1.0/lib/clang/libllvmarmcodegen/Makefile 235633 2012-05-18 21:49:11Z dim $ LIB= llvmarmcodegen SRCDIR= lib/Target/ARM SRCS= ARMAsmPrinter.cpp \ ARMBaseInstrInfo.cpp \ ARMBaseRegisterInfo.cpp \ ARMCodeEmitter.cpp \ ARMConstantIslandPass.cpp \ ARMConstantPoolValue.cpp \ ARMELFWriterInfo.cpp \ ARMExpandPseudoInsts.cpp \ ARMFastISel.cpp \ ARMFrameLowering.cpp \ ARMHazardRecognizer.cpp \ ARMISelDAGToDAG.cpp \ ARMISelLowering.cpp \ ARMInstrInfo.cpp \ ARMJITInfo.cpp \ ARMLoadStoreOptimizer.cpp \ ARMMCInstLower.cpp \ ARMMachineFunctionInfo.cpp \ ARMRegisterInfo.cpp \ ARMSelectionDAGInfo.cpp \ ARMSubtarget.cpp \ ARMTargetMachine.cpp \ ARMTargetObjectFile.cpp \ MLxExpansionPass.cpp \ Thumb1FrameLowering.cpp \ Thumb1InstrInfo.cpp \ Thumb1RegisterInfo.cpp \ Thumb2ITBlockPass.cpp \ Thumb2InstrInfo.cpp \ Thumb2RegisterInfo.cpp \ Thumb2SizeReduction.cpp TGHDRS= ARMGenAsmWriter \ ARMGenCallingConv \ ARMGenCodeEmitter \ ARMGenDAGISel \ ARMGenFastISel \ ARMGenInstrInfo \ ARMGenMCCodeEmitter \ ARMGenMCPseudoLowering \ ARMGenRegisterInfo \ ARMGenSubtargetInfo \ Intrinsics .include "../clang.lib.mk"